UC San Diego

As the Silicon based MOSFET scaling is close to an end, high mobility III-V MOSFET is considered one of the most promising candidates in continuing Moore's Law. By replacing the channel from Silicon to III-V high mobility materials, it is expected that the on-current can be further increased, or the same on-current level can be achieved with decreased VDS, which lowers power consumption. However, the high interface and bulk-oxide trap densities are still major issues. These two kinds of trap states deteriorate device performance by lowering device on-current, increasing inverse subthreshold slope, and causing hysteresis (history effect). Fabricating high quality dielectric with low defect density on the interface and inside high-k dielectric is still a critical challenge which needs to be overcome. In this dissertation, two trap models are introduced to simulate the MOS capacitor C-V and G-V dispersions : full interface state model and distributed bulk-oxide trap model. One major application of the models is extracting the interface and bulk-oxide trap densities. Therefore, they can be applied to assist the researchers in the field monitoring the results after certain fabrication procedures. Furthermore, the models can be used to interpret the measuring data, such as the linear capacitance dispersion in accumulation region from bulk-oxide traps, the high-low capacitance dispersion in depletion from interface traps, and the C-V humps in n-type InGaAs MOS from depletion to inversion from the combination effect of increasing interface trap densities and majority carrier time constants. Such "know why" is the key of success in all the field of scientific study assisting the "know how" of engineering work. Furthermore, the insulator thickness effect, temperature effect, and light illumination effect on MOS C-V dispersions are also studied. It is shown that the data in all the conditions can be satisfactorily explained by the frame work of the small signal models with the same trap density. Other trap extraction methods and models, such as Terman method and conductance method for interface traps, and lumped circuit model, including Hasegawa model, for bulk-oxide traps, are also reviewed and commented in the dissertation